Digital Signal Transmission with Chaotic Encryption: Design and Evaluation of a FPGA Realization

A discrete-time discrete-value pseudo-chaotic encoder/decoder system is presented. The pseudo-chaotic module is a 3D discrete version of the well-known Lorenz dynamical system. Scaling and biasing transformations as well as natural number arithmetics are employed in order to simplify realizations on a small size Field Programmable Gate Array (FPGA). The encryption ability is improved by using only the least significant byte of one of the pseudo chaotic state variables as the key to encrypt the plain text. The key is periodically perturbed by another chaotic state variable. The statistical properties of the pseudo chaotic cipher are compared with those of other pseudo-random generators available in the literature. As an example of applicability of the technique, a full duplex communication system is designed and constructed using FPGA as technological framework. Index Terms – chaotic communication, encryption, ciphers, FPGA